Presentation 1995/5/26
High Speed CMOS Interface Circuit : ALINX
Kazukiyo Haga, Susumu Yamada, Kuniharu Hirose, Koichi Yokomizo, Takashi Tomita,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) This paper describes evaluation results on transmission characteristics of the low-voltage and high-speed interface circuit : ALINX, Advanced Low-voltage Interface Circuit System, which is developed by a 0.5μm CMOS process technology to implement high-speed, low power, cost effective interconnection for digital telecommunication systems. First, we show proposed implementation respectively interface circuits, and present the specification of transmission characteristics of the circuits. Next, we report some results on transmission characteristics of the circuits in detail, which were obtained using of a LSI chip set. In addition to those characteristics, we describe overall transmission performance including low noise performance, and hot insertion capability. Finally, we describe a study on noise design of ALINX applied a digital telecommunication systems.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Interface / High-speed transmission / Low power consumpution / 0.5μm CMOS process technology / B-ISDN
Paper #
Date of Issue

Conference Information
Committee ICD
Conference Date 1995/5/26(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) High Speed CMOS Interface Circuit : ALINX
Sub Title (in English)
Keyword(1) Interface
Keyword(2) High-speed transmission
Keyword(3) Low power consumpution
Keyword(4) 0.5μm CMOS process technology
Keyword(5) B-ISDN
1st Author's Name Kazukiyo Haga
1st Author's Affiliation Network Systems Development Division Oki Electric Industry Co., Ltd.()
2nd Author's Name Susumu Yamada
2nd Author's Affiliation Network Systems Development Division Oki Electric Industry Co., Ltd.
3rd Author's Name Kuniharu Hirose
3rd Author's Affiliation Network Systems Development Division Oki Electric Industry Co., Ltd.
4th Author's Name Koichi Yokomizo
4th Author's Affiliation VLSI Research & Development Center Oki Electric Industry Co., Ltd.
5th Author's Name Takashi Tomita
5th Author's Affiliation VLSI Research & Development Center Oki Electric Industry Co., Ltd.
Date 1995/5/26
Paper #
Volume (vol) vol.95
Number (no) 72
Page pp.pp.-
#Pages 8
Date of Issue