Presentation | 1995/5/26 Trend of High Speed I/O Interface Michihiro Yamada, Yasuhiro Konishi, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Operating frequency of Memory Bus, which is connecting between MPU and Memory, increases to 66-100MHz frequency range. As a result, the conventional interface of TTL is facing technical difficulties over 50MHz operation, and High Speed I/O interface has become a big issue. This report describes recent trend of High Speed I/O interface and provides simulation results to compare several I/O interfaces. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | HSTL / ST-Bus / GTL / CTT / LVTTL |
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Conference Information | |
Committee | ICD |
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Conference Date | 1995/5/26(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Trend of High Speed I/O Interface |
Sub Title (in English) | |
Keyword(1) | HSTL |
Keyword(2) | ST-Bus |
Keyword(3) | GTL |
Keyword(4) | CTT |
Keyword(5) | LVTTL |
1st Author's Name | Michihiro Yamada |
1st Author's Affiliation | Mitsubishi Electric Corp. ULSI Laboratory() |
2nd Author's Name | Yasuhiro Konishi |
2nd Author's Affiliation | Mitsubishi Electric Corp. ULSI Laboratory |
Date | 1995/5/26 |
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Volume (vol) | vol.95 |
Number (no) | 72 |
Page | pp.pp.- |
#Pages | 8 |
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