| Presentation | 1995/5/25 Low Power Circuit Technologies for GaAs DCFL SRAMs Haruya Iwata, Atsunori Hirobe, Tadayoshi Enomoto, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A 4kbit(256word×16bit)SRAM has been designed using 0.5μm GaAs MESFET technology. With a 1V power supply, SPICE calculation results showed that its access time and power dissipation were 1nsec and 1,037mW, respectively. Two effective methods to reduce power dissipation were proposed and applied to the above mentioned 4kb SRAM. They are (1) reduction of MESFET threshold voltages along with power supply voltages, and (2) the use of lower voltage in memory cells than the power supply voltage. These two technologies have been simultaneously applied to the 4kb SRAM. With a 0.5V power supply, the caluculated access time and power dissipation were 1.85nsec and 74mW, respectively. This power dissipation is one forteenth that of the 1V 4kbit SRAM. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | GaAs MESFET / SRAM / through drain current / low voltage / low power dissipation |
| Paper # | |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
|---|---|
| Conference Date | 1995/5/25(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Low Power Circuit Technologies for GaAs DCFL SRAMs |
| Sub Title (in English) | |
| Keyword(1) | GaAs MESFET |
| Keyword(2) | SRAM |
| Keyword(3) | through drain current |
| Keyword(4) | low voltage |
| Keyword(5) | low power dissipation |
| 1st Author's Name | Haruya Iwata |
| 1st Author's Affiliation | Institute of Science and Engineering, Chuo University() |
| 2nd Author's Name | Atsunori Hirobe |
| 2nd Author's Affiliation | Institute of Science and Engineering, Chuo University |
| 3rd Author's Name | Tadayoshi Enomoto |
| 3rd Author's Affiliation | Institute of Science and Engineering, Chuo University |
| Date | 1995/5/25 |
| Paper # | |
| Volume (vol) | vol.95 |
| Number (no) | 71 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |