Presentation 1995/5/25
A 1.6GB/s Data-Transfer-Rate 8Mb Embedded DRAM
Masaharu Wada, Katsuhiko Sato, Tomoaki Yabe, Ryo Haga, Motohiro Enkaku, Masahisa Ohgata, Sinji Miyano, Kenji Numata, Hiroshi Shinya, Tohru Furuyama,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) A 3.3V 8Mb embedded DRAM achieves a 1.6GB/s data transfer rate and page-fault tolerance. Accessing across different pages is performed in a minimum column cycle using a data latch between sense amplifier and column select gate connect to global-data-line. High bandwidth is achieved with a 128b data bus operating at 100MHz. The 113mm^2 DRAM macro is embedded in a sea of gate in 0.5μm CMOS two metal technology.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) DRAM / CMOS / Embedded-Memory / Gate-Array
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Conference Date 1995/5/25(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A 1.6GB/s Data-Transfer-Rate 8Mb Embedded DRAM
Sub Title (in English)
Keyword(1) DRAM
Keyword(2) CMOS
Keyword(3) Embedded-Memory
Keyword(4) Gate-Array
1st Author's Name Masaharu Wada
1st Author's Affiliation SEMICONDUCTOR DEVICE ENGINEERING LABORATORY TOSHIBA CORPORATION()
2nd Author's Name Katsuhiko Sato
2nd Author's Affiliation SEMICONDUCTOR DEVICE ENGINEERING LABORATORY TOSHIBA CORPORATION
3rd Author's Name Tomoaki Yabe
3rd Author's Affiliation SEMICONDUCTOR DEVICE ENGINEERING LABORATORY TOSHIBA CORPORATION
4th Author's Name Ryo Haga
4th Author's Affiliation SEMICONDUCTOR DEVICE ENGINEERING LABORATORY TOSHIBA CORPORATION
5th Author's Name Motohiro Enkaku
5th Author's Affiliation SEMICONDUCTOR DEVICE ENGINEERING LABORATORY TOSHIBA CORPORATION
6th Author's Name Masahisa Ohgata
6th Author's Affiliation SEMICONDUCTOR DEVICE ENGINEERING LABORATORY TOSHIBA CORPORATION
7th Author's Name Sinji Miyano
7th Author's Affiliation SEMICONDUCTOR DEVICE ENGINEERING LABORATORY TOSHIBA CORPORATION
8th Author's Name Kenji Numata
8th Author's Affiliation SEMICONDUCTOR DEVICE ENGINEERING LABORATORY TOSHIBA CORPORATION
9th Author's Name Hiroshi Shinya
9th Author's Affiliation SEMICONDUCTOR DEVICE ENGINEERING LABORATORY TOSHIBA CORPORATION
10th Author's Name Tohru Furuyama
10th Author's Affiliation SEMICONDUCTOR DEVICE ENGINEERING LABORATORY TOSHIBA CORPORATION
Date 1995/5/25
Paper #
Volume (vol) vol.95
Number (no) 71
Page pp.pp.-
#Pages 6
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