| Presentation | 1993/10/21 A 0.5μm CMOS Video Signal Processor Hiroki Suto, Takao Yano, Tetsuro Komatsu, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A Video signal processor including four pipelined data processing units has been developed with 0.5μm CMOS fabrication te chnology.It integrates 110K gates and 6OKb SRAM into a 13.7mm x 13. 7mm die area.It containes 5V-interface-I, O and PLL.The supply voltage is 3.3V.The Video sigiaal processor operates normaly at 5OMHz.With this performance,a single board 64Kb/s full-CIF video codec is implemented. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | CMOS / LSI / 5V-interface-I/ / PLL / DSP |
| Paper # | ICD93-106 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1993/10/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A 0.5μm CMOS Video Signal Processor |
| Sub Title (in English) | |
| Keyword(1) | CMOS |
| Keyword(2) | LSI |
| Keyword(3) | 5V-interface-I/ |
| Keyword(4) | PLL |
| Keyword(5) | DSP |
| 1st Author's Name | Hiroki Suto |
| 1st Author's Affiliation | NTT LSI Laboratories() |
| 2nd Author's Name | Takao Yano |
| 2nd Author's Affiliation | NTT Electronics Technology |
| 3rd Author's Name | Tetsuro Komatsu |
| 3rd Author's Affiliation | NTT LSI Laboratories |
| Date | 1993/10/21 |
| Paper # | ICD93-106 |
| Volume (vol) | vol.93 |
| Number (no) | 287 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |