| Presentation | 1993/9/17 Neuron MOS Winner-Take-All Circuit and Its Application to Associative Memory Tadashi Shibata, Takeo Yamashita, Tadahiro Ohmi, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A winner-take-all circuit has been constructed in a very simple manner using a highly functional device called neuron MOSFET(abbreviated as νMOS)which simulates the behavior of biologi cal neurons.The circuit can find the largest data and identify its location among a large number of input data.The circuit has been applied to build an associative memory which can seek the most similar data in the memory to a reference data shown to the memory. Since the search for the most similar data is conducted by fully parallel processing at a transistor level,no time consuming software manipulation of data is required.This approach is different both in principle and architecture from the so called Hopfield neural network.Measurements results on test circuits fabricated by a standard double polysilicon CMOS process and circuit simulation results are presented and discussed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Winner-Take-All / Associative Memory / Neuron MOS Transistor / Functional Device / Variable Threshold Transistor |
| Paper # | ICD93-98,DSP93-59 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
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| Conference Date | 1993/9/17(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Neuron MOS Winner-Take-All Circuit and Its Application to Associative Memory |
| Sub Title (in English) | |
| Keyword(1) | Winner-Take-All |
| Keyword(2) | Associative Memory |
| Keyword(3) | Neuron MOS Transistor |
| Keyword(4) | Functional Device |
| Keyword(5) | Variable Threshold Transistor |
| 1st Author's Name | Tadashi Shibata |
| 1st Author's Affiliation | Department of Electronic Engineering,Faculty of Engineering,Tohoku University() |
| 2nd Author's Name | Takeo Yamashita |
| 2nd Author's Affiliation | Department of Electronic Engineering,Faculty of Engineering,Tohoku University |
| 3rd Author's Name | Tadahiro Ohmi |
| 3rd Author's Affiliation | Department of Electronic Engineering,Faculty of Engineering,Tohoku University |
| Date | 1993/9/17 |
| Paper # | ICD93-98,DSP93-59 |
| Volume (vol) | vol.93 |
| Number (no) | 231 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |