Presentation 1996/9/26
A PWM Signal Processing Core Circuit based on a switched current integration technique
Makoto Nagata, Jun Funakoshi, Atsushi Iwata,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) A highly functional circuit for Pulse Width Moduration (PWM) signals is proposed. The circuit realizes linear arithmetic operations on PWM signals on the basis of a switched current integration technique. A 0.8um CMOS test chip with 8 inputs operates parallel additions and multiplications at the accuracy of 1.2ns. An output impedance of a switched current source causes a quadratic error to these linear operations. The cumulative prpoperty of the technique can reduce power dissipation in accumulation operations to about 1/4 of the binary digital implementation. The circuit functions as also a neuron with built-in PWM-MAC and a nonlinear operation unit.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Pulse Width Moduration signal / switched current integration technique / A-D merged circuit architecture
Paper # ICD96-110
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Conference Date 1996/9/26(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A PWM Signal Processing Core Circuit based on a switched current integration technique
Sub Title (in English)
Keyword(1) Pulse Width Moduration signal
Keyword(2) switched current integration technique
Keyword(3) A-D merged circuit architecture
1st Author's Name Makoto Nagata
1st Author's Affiliation Faculty of Engineering, Hiroshima University()
2nd Author's Name Jun Funakoshi
2nd Author's Affiliation Faculty of Engineering, Hiroshima University
3rd Author's Name Atsushi Iwata
3rd Author's Affiliation Faculty of Engineering, Hiroshima University
Date 1996/9/26
Paper # ICD96-110
Volume (vol) vol.96
Number (no) 266
Page pp.pp.-
#Pages 8
Date of Issue