| Presentation | 1997/3/7 A Microprocessor Architecture with Hardware Implemented Instruction Set Toshiyuki MOURI, Yousuke YAMAMOTO, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A novel microprocessor architecture has been presented to simplify the processor structure and to acceralate the excution speed. The processor is named as DISC or direct instruction set computer, in which each machine-code operator is executed by corresponding basic functional unit. The experimentally designed processor consist of four basic units and 64x8bit SRAM in 2.3mm^2 chip using 0.5um CMOS process and is now fabricated at VISI-center. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | microprocessor / architecture / instruction / hardware |
| Paper # | VLD96-109,ICD96-219 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1997/3/7(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Microprocessor Architecture with Hardware Implemented Instruction Set |
| Sub Title (in English) | |
| Keyword(1) | microprocessor |
| Keyword(2) | architecture |
| Keyword(3) | instruction |
| Keyword(4) | hardware |
| 1st Author's Name | Toshiyuki MOURI |
| 1st Author's Affiliation | Dept. of Electronic Engineering, Faculty of Engineering, Tamagawa University() |
| 2nd Author's Name | Yousuke YAMAMOTO |
| 2nd Author's Affiliation | Dept. of Electronic Engineering, Faculty of Engineering, Tamagawa University |
| Date | 1997/3/7 |
| Paper # | VLD96-109,ICD96-219 |
| Volume (vol) | vol.96 |
| Number (no) | 558 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |