| Presentation | 1997/3/7 Bus Data Coding with Low Coupled Signal for Low Power VLSI T. Mido, M. Ikeda, K. Asada, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Importance of power dissipation and delay of bus lines is increasing in realizing high-performance VLSI circuits, as the feature size is miniaturized down to the deep submicron region. In this paper, we take into account the charge of mutual capacitance as well as charge of self capacitance in evaluating the power dissipation in VLSI bus lines. And by using conventional method, we found that the larger the mutual capacitance become, the lower the advantage of the method become. We propose a new bus data coding method for decreasing the signal transitions in space as well as in time. Along with a low coupled signal method, we demonstrate from 10% to 20% reduction of the total effective transitions in mutual capacitance. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | VLSI / Bus Lines / Self-Capacitance / Mutual Capacitance / Low Coupled Signal |
| Paper # | VLD96-108,ICD96-218 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1997/3/7(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Bus Data Coding with Low Coupled Signal for Low Power VLSI |
| Sub Title (in English) | |
| Keyword(1) | VLSI |
| Keyword(2) | Bus Lines |
| Keyword(3) | Self-Capacitance |
| Keyword(4) | Mutual Capacitance |
| Keyword(5) | Low Coupled Signal |
| 1st Author's Name | T. Mido |
| 1st Author's Affiliation | Department of Electronic Engineering,(VDEC) University of Tokyo() |
| 2nd Author's Name | M. Ikeda |
| 2nd Author's Affiliation | Department of Electronic Engineering,(VDEC) University of Tokyo |
| 3rd Author's Name | K. Asada |
| 3rd Author's Affiliation | Department of Electronic Engineering,(VDEC) University of Tokyo |
| Date | 1997/3/7 |
| Paper # | VLD96-108,ICD96-218 |
| Volume (vol) | vol.96 |
| Number (no) | 558 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |