| Presentation | 1998/3/5 A Co-evaluation of the Architectures and the CAD system for Speed-oriented FPGAs Tsunemasa Hayashi, Atsushi Takahara, Kennosuke Fukami, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents an FPGA architecture for high-speed systems, such as next-generation B-ISDN telecommunications systems.Such a system requires an LSI in which an over-10K-gate circuit can be implemented and that has a clock cycle rate of 80MHz.So far, the FPGA architecture has only been discussed in terms of its circuit structure.In contrast, we consider the circuit structure of the FPGA along with the performance of its dedicated CAD system.We evaluate several FPGA logic-element structures with a technology mapping method.From these experiments, a multiplexor-based logic-element is found to be suitable for implementing such a high-speed circuit using the BDD-based technology mapping method.In addition, we examine how to best utilize the characteristics of the selected logic-cell structure in designing the wiring structure.It is found that the multiplexor-based cell can be connected efficiently in a clustered wiring structure. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / telecommunications / MUX-type logic cell / BDD-based technologymapping / clustered wiring structure |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1998/3/5(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Co-evaluation of the Architectures and the CAD system for Speed-oriented FPGAs |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | telecommunications |
| Keyword(3) | MUX-type logic cell |
| Keyword(4) | BDD-based technologymapping |
| Keyword(5) | clustered wiring structure |
| 1st Author's Name | Tsunemasa Hayashi |
| 1st Author's Affiliation | NTT Optical Network Systems Labs() |
| 2nd Author's Name | Atsushi Takahara |
| 2nd Author's Affiliation | NTT Optical Network System Labs |
| 3rd Author's Name | Kennosuke Fukami |
| 3rd Author's Affiliation | NTT Science and Core Technology Lab.Group |
| Date | 1998/3/5 |
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| Volume (vol) | vol.97 |
| Number (no) | 578 |
| Page | pp.pp.- |
| #Pages | 11 |
| Date of Issue | |