Presentation | 1998/3/5 A Generation System for Hardware Description of Pipelined Processors Masachika HAMABE, Atsushi NOSE, Nozomu TOGAWA, Masao YANAGISAWA, Tatsuo OHTSUKI, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | This paper proposes a system which generates a hardware description of pipelined processor. The system accepts a pipeline stage information, an instruction set, a detapath width and VHDL descriptions of hardware units contained in the library as an input, and produces VHDL descriptions of processors, an order of analyzing VHDL files, a code generation information for assembler as an output. The system produces processor ranging from nonpipeline architecture to 2-way VLIW architecture. The number of lines of code is reduced to 1/10 in contrast with manual description. According to the result of logic synthesis of the generated description, we estimate a hardware cost used in hardware/software codesign system. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | processor description generation / VHDL / hardware/software co-design |
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Committee | ICD |
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Conference Date | 1998/3/5(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Generation System for Hardware Description of Pipelined Processors |
Sub Title (in English) | |
Keyword(1) | processor description generation |
Keyword(2) | VHDL |
Keyword(3) | hardware/software co-design |
1st Author's Name | Masachika HAMABE |
1st Author's Affiliation | Dept.of Electronics, Information and Communication Engineering() |
2nd Author's Name | Atsushi NOSE |
2nd Author's Affiliation | Dept.of Electronics, Information and Communication Engineering |
3rd Author's Name | Nozomu TOGAWA |
3rd Author's Affiliation | Dept.of Electronics, Information and Communication Engineering |
4th Author's Name | Masao YANAGISAWA |
4th Author's Affiliation | Dept.of Electronics, Information and Communication Engineering |
5th Author's Name | Tatsuo OHTSUKI |
5th Author's Affiliation | Dept.of Electronics, Information and Communication Engineering |
Date | 1998/3/5 |
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Volume (vol) | vol.97 |
Number (no) | 578 |
Page | pp.pp.- |
#Pages | 8 |
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