| Presentation | 1998/1/21 Temperture compensation technique of GaAs FET by rotating the gate orientation H. Furukawa, T. Tanaka, H. Ishida, D. Ueda, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A temperature compensation technique of GaAs FET has been studied. It is found that temperature dependence of the drain current and the threshold voltage of GaAs FET is strongly related to the gate orientation. It is revealed that the cause of the temperature dependence is piezoelectric charges that are induced in the chip by a mechanical stress. The origin of the stress is a difference of thermal expansion coefficient of GaAs and base metal of leadframe. Based on the relation between the piezoelectric effect and the temperature dependence, we found a technique of temperature compensation of the drain current used for GaAs FET by rotating the gate orientation. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | powerFET / temperature dependence / stress / piezo-electric effect / power amplifier / thermal runaway |
| Paper # | ICD97-196 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1998/1/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Temperture compensation technique of GaAs FET by rotating the gate orientation |
| Sub Title (in English) | |
| Keyword(1) | powerFET |
| Keyword(2) | temperature dependence |
| Keyword(3) | stress |
| Keyword(4) | piezo-electric effect |
| Keyword(5) | power amplifier |
| Keyword(6) | thermal runaway |
| 1st Author's Name | H. Furukawa |
| 1st Author's Affiliation | Electronics Research Laboratory, Matsushita Electronics Corporation() |
| 2nd Author's Name | T. Tanaka |
| 2nd Author's Affiliation | Electronics Research Laboratory, Matsushita Electronics Corporation |
| 3rd Author's Name | H. Ishida |
| 3rd Author's Affiliation | Electronics Research Laboratory, Matsushita Electronics Corporation |
| 4th Author's Name | D. Ueda |
| 4th Author's Affiliation | Electronics Research Laboratory, Matsushita Electronics Corporation |
| Date | 1998/1/21 |
| Paper # | ICD97-196 |
| Volume (vol) | vol.97 |
| Number (no) | 480 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |