| Presentation | 1997/10/28 Asynchronous VLSI Systems Design TAKASHI NANYA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | With the wire-delay problem moving into dominance in VLSI chip design, asynchronous circuit/system design is enjoying a worldwide resurgence of interest, having been stimulating an increasing amount of work in this area for the last decade. Scientific American described this situation as "reviving a challenger to the modern microchip" in its issue of June 1995. In this note, we review recent developments of asynchronous microprocessor design and show a new perspective for VLSI design methodologies in the 21th century. |
| Keyword(in Japanese) | (See Japanese page) |
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| Paper # | ICD97-174 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1997/10/28(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Asynchronous VLSI Systems Design |
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| 1st Author's Name | TAKASHI NANYA |
| 1st Author's Affiliation | Research Center for Advanced Science and Technology, University of Tokyo() |
| Date | 1997/10/28 |
| Paper # | ICD97-174 |
| Volume (vol) | vol.97 |
| Number (no) | 345 |
| Page | pp.pp.- |
| #Pages | 6 |
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