Presentation 1997/10/17
Generation of Reciprocal, Square Root, and So Forth by Means of a Multiplier with an Operand Modifier
Naofumi Takagi,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) An efficient method for generating the reciprocal, square root, square root reciprocal, square reciprocal, cube, and so forth of an operand by means of a multiplier with an operand modifier is proposed. The operand modifier performs bitwise complementation, shift and/or redundant binary Booth recoding. The method is a modification of the piecewise linear approximation based on the first-order Taylor expansion. The same accuracy is achieved. The multiplication and an addition required for the linear approximation are replaced by only one multiplication with a modification of the operand. The required table size is reduced, because only one coefficient has to be stored. 1 clock cycle may be saved, because the addition is removed.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Arithmetic circuit / function generation / reciprocal / square root / initial approximation
Paper # ICD97-159-170
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Conference Date 1997/10/17(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Generation of Reciprocal, Square Root, and So Forth by Means of a Multiplier with an Operand Modifier
Sub Title (in English)
Keyword(1) Arithmetic circuit
Keyword(2) function generation
Keyword(3) reciprocal
Keyword(4) square root
Keyword(5) initial approximation
1st Author's Name Naofumi Takagi
1st Author's Affiliation Department of Information Engineering, Nagoya University()
Date 1997/10/17
Paper # ICD97-159-170
Volume (vol) vol.97
Number (no) 319
Page pp.pp.-
#Pages 8
Date of Issue