| Presentation | 1997/10/17 A Multimedia RISC processor with RDRAM interface Kazumasa SUZUKI, Tomohisa ARAI, Ichiro KURODA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We are developing a multi-media RISC processor, V830R/AV, which processes efficiently video data, such that digital TV. The processor integrates a SIMD function unit on V800 series microcontroller architecture, and adapts 2-issue superscaler of a 32-bit function unit and the SIMD function unit. The SIMD function unit operates mostly four 16bit-functions as same as eight 8bit-functions, and two 32bit-functions, and performs efficiently parallel operation, especially video signal processing. The processor encouraged by the SIMD function unit, promises MPEG2 video signal decoding performance. A RDRAM interface circuit embedded in the chip achieves 533Mbyte/s data transmission between the processor and main memories, in order to supply large amount of video data. The processor includes a video interface circuit and an audio interface circuit, and realizes a multimedia system with a little peripheral LSI chips. The die is fabricated with 0.25μm CMOS process, and has about 3.9 million transistors. It works with 200MHz clock on 2.5V power supply, and consumes about 2W. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | microprocessor / RISC / multimedia / superscaler / RDRAM / MPEG2-decode |
| Paper # | ICD97-159-170 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1997/10/17(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Multimedia RISC processor with RDRAM interface |
| Sub Title (in English) | |
| Keyword(1) | microprocessor |
| Keyword(2) | RISC |
| Keyword(3) | multimedia |
| Keyword(4) | superscaler |
| Keyword(5) | RDRAM |
| Keyword(6) | MPEG2-decode |
| 1st Author's Name | Kazumasa SUZUKI |
| 1st Author's Affiliation | System ULSI Res. Lab., Silicon Systems Res. Labs., NEC() |
| 2nd Author's Name | Tomohisa ARAI |
| 2nd Author's Affiliation | Microcomputer division, System LSI operations unit, NEC |
| 3rd Author's Name | Ichiro KURODA |
| 3rd Author's Affiliation | C&C media Res. Labs., NEC |
| Date | 1997/10/17 |
| Paper # | ICD97-159-170 |
| Volume (vol) | vol.97 |
| Number (no) | 319 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |