| Presentation | 1997/10/16 A Complementary Half-Swing Bus Architecture and its Application for Wide Band SRAM Macro Yasunobu Nakase, Atsushi Iwabu, Harufusa Kondo, Koichiro Mashiko, Yoshio Matsuda, Takeshi Tokuda, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A complementary half-swing bus architecture is proposed for high speed and low power operation. This architecture transfers data in mutual direction and solves the problem of two times as many as bus lines of conventional small swing architectures. It is applied to an SRAM macro with 112-bit bus and 84 K-bit capacity for an ATM switch LSI. The architecture operates beyond 200MHz at the supply voltage of 3.3V with a 0.5μm CMOS process technology. Moreover, we confirmed that the cross talk enlarged the logical swing. Simulation results show that the worst case power dissipation and the peak current are reduced by half and by 66%, respectively compared with full swing bus driver architectures. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | small swing bus / low power / SRAM / ATM switch |
| Paper # | ICD97-150-158 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1997/10/16(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Complementary Half-Swing Bus Architecture and its Application for Wide Band SRAM Macro |
| Sub Title (in English) | |
| Keyword(1) | small swing bus |
| Keyword(2) | low power |
| Keyword(3) | SRAM |
| Keyword(4) | ATM switch |
| 1st Author's Name | Yasunobu Nakase |
| 1st Author's Affiliation | System LSI Laboratory, Mitsubishi Electric Corporation() |
| 2nd Author's Name | Atsushi Iwabu |
| 2nd Author's Affiliation | LSI Engineering Office, Mitsubishi Electric Engineering Company |
| 3rd Author's Name | Harufusa Kondo |
| 3rd Author's Affiliation | System LSI Laboratory, Mitsubishi Electric Corporation |
| 4th Author's Name | Koichiro Mashiko |
| 4th Author's Affiliation | System LSI Laboratory, Mitsubishi Electric Corporation |
| 5th Author's Name | Yoshio Matsuda |
| 5th Author's Affiliation | System LSI Laboratory, Mitsubishi Electric Corporation |
| 6th Author's Name | Takeshi Tokuda |
| 6th Author's Affiliation | System LSI Laboratory, Mitsubishi Electric Corporation |
| Date | 1997/10/16 |
| Paper # | ICD97-150-158 |
| Volume (vol) | vol.97 |
| Number (no) | 318 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |