Presentation 1997/10/16
A Charge-Transfer-Amplifier and an Encoded-Bus Architecture for Low-Power SRAM's
Shoichiro Kawashima, Toshihiko Mori, Ryuhei Sasagawa, Makoto Hamaminato, Shigetoshi Wakayama, Kazuo Sukegawa, Isao Fukushi,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) We proposed and tested a low power SRAM using charge transfer (CT) pre-sense amplifier and a bus signal encoding scheme. The CT amplifier compensates the Vth mismatch between the pair MOS transistors, and the encoded bud signal reduces the number of wires being switched. They are dynamically controlled by a low power DLL we proposed. The fabricated 2K×16b SRAM worked at 50MHz with the power dissipation of 5mW at 1V power supply.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Low-power / SRAM / Charge-transfer-amplifier / Encoded-bus / DLL
Paper # ICD97-150-158
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Conference Date 1997/10/16(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Charge-Transfer-Amplifier and an Encoded-Bus Architecture for Low-Power SRAM's
Sub Title (in English)
Keyword(1) Low-power
Keyword(2) SRAM
Keyword(3) Charge-transfer-amplifier
Keyword(4) Encoded-bus
Keyword(5) DLL
1st Author's Name Shoichiro Kawashima
1st Author's Affiliation Fujitsu Laboratories Limited()
2nd Author's Name Toshihiko Mori
2nd Author's Affiliation Fujitsu Laboratories Limited
3rd Author's Name Ryuhei Sasagawa
3rd Author's Affiliation Fujitsu Laboratories Limited
4th Author's Name Makoto Hamaminato
4th Author's Affiliation Fujitsu Laboratories Limited
5th Author's Name Shigetoshi Wakayama
5th Author's Affiliation Fujitsu Laboratories Limited
6th Author's Name Kazuo Sukegawa
6th Author's Affiliation Fujitsu Limited
7th Author's Name Isao Fukushi
7th Author's Affiliation Fujitsu Laboratories Limited
Date 1997/10/16
Paper # ICD97-150-158
Volume (vol) vol.97
Number (no) 318
Page pp.pp.-
#Pages 8
Date of Issue