| Presentation | 1997/9/26 Development and Evaluation of Parallel Computer System Specific for Monte Carlo Device Simulation Tamio Shimatani, Keiichi Hirano, Hiroyuki Kurino, Mitsumasa Koyanagi, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In ultra small devices with the gate length of sub-0.1pm, device simuilation based on Monte Carlo method is effective to analyse the physical phenomena such as hot carrier effect. In Monte Carlo method, the number of particles or the tracing time is increased to obtain the precise solution. As a result, the computational time becomes tremendously long. To overcome such problem of huge computational time, we have designed and developed a parallel computer system specific for Monte Carlo device simulation. Successful operation of this system have been confirmed by running the parallel Monte Carlo device simulator on this system. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Device simulation / Monte Carlo method / Parallel processing / Monte Carlo RISC chip / One-way ring bus connection |
| Paper # | ICD97-148 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
|---|---|
| Conference Date | 1997/9/26(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Development and Evaluation of Parallel Computer System Specific for Monte Carlo Device Simulation |
| Sub Title (in English) | |
| Keyword(1) | Device simulation |
| Keyword(2) | Monte Carlo method |
| Keyword(3) | Parallel processing |
| Keyword(4) | Monte Carlo RISC chip |
| Keyword(5) | One-way ring bus connection |
| 1st Author's Name | Tamio Shimatani |
| 1st Author's Affiliation | Department of Machine Intelligence and System Engineering, Intelligent System Design Laboratory, Tohoku University() |
| 2nd Author's Name | Keiichi Hirano |
| 2nd Author's Affiliation | Department of Machine Intelligence and System Engineering, Intelligent System Design Laboratory, Tohoku University |
| 3rd Author's Name | Hiroyuki Kurino |
| 3rd Author's Affiliation | Department of Machine Intelligence and System Engineering, Intelligent System Design Laboratory, Tohoku University |
| 4th Author's Name | Mitsumasa Koyanagi |
| 4th Author's Affiliation | Department of Machine Intelligence and System Engineering, Intelligent System Design Laboratory, Tohoku University |
| Date | 1997/9/26 |
| Paper # | ICD97-148 |
| Volume (vol) | vol.97 |
| Number (no) | 275 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |