Presentation | 1997/9/25 Scaling Methodology for Low Power Fully Depleted SOI MOSFET's and Comparison with Bulk MOSFET's Makoto Takamiya, Yuri Yasuda, Toshiro Hiramoto, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We have developed the scaling methodology for FD SOI MOSFETs for very low power applications and shown a scaling scenario to the deep sub-0.1μm regime. Based on the methodology, we have proposed device structures of ultra thin FD SOI MOSFETs. We compared FD SOI MOSFETs with bulk MOSFETs by the 2D device simulation and shown that, unlike bulk MOSFETs, FD SOI MOSFETs will be miniaturized further by thinning SOI thickness without degrading the steep subthreshold slope and increasing Vth fluctuations, even if the gate oxide thickness is not scaled. Ultra small FD SOI MOSFETs will realize ultra low power LSIs, because of the steep subthreshold swing, low parasitic capacitances, and the miniaturization. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Low Power / Fully-Depleted SOI MOSFET / Subthreshold Swing / Scaling / Short Channel Effect / Vth Fluctuation / Comparison with Bulk MOSFET's |
Paper # | ICD97-131 |
Date of Issue |
Conference Information | |
Committee | ICD |
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Conference Date | 1997/9/25(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Scaling Methodology for Low Power Fully Depleted SOI MOSFET's and Comparison with Bulk MOSFET's |
Sub Title (in English) | |
Keyword(1) | Low Power |
Keyword(2) | Fully-Depleted SOI MOSFET |
Keyword(3) | Subthreshold Swing |
Keyword(4) | Scaling |
Keyword(5) | Short Channel Effect |
Keyword(6) | Vth Fluctuation |
Keyword(7) | Comparison with Bulk MOSFET's |
1st Author's Name | Makoto Takamiya |
1st Author's Affiliation | Institute of Industrial Science, University of Tokyo() |
2nd Author's Name | Yuri Yasuda |
2nd Author's Affiliation | Institute of Industrial Science, University of Tokyo |
3rd Author's Name | Toshiro Hiramoto |
3rd Author's Affiliation | Institute of Industrial Science, University of Tokyo:VLSI Design and Education Center, University of Tokyo |
Date | 1997/9/25 |
Paper # | ICD97-131 |
Volume (vol) | vol.97 |
Number (no) | 274 |
Page | pp.pp.- |
#Pages | 8 |
Date of Issue |