Presentation | 1997/9/25 A Minimization Scheme for a period of Process Simulator Development in TCAD : Development of Simulation Standard Libraries and an Application Mitsutoshi Nakamura, Takahiro Nakauchi, Toshikazu Fukuda, Naoki Kusunoki, Takahisa Kanemura, Sanae Fukuda, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | TCAD has been expected to become a useful tool for minimizing a period of device development, and faster development of simulator is strongly demanded to fulfill the expectation. We have developed standard software libraries first, and then constructed a process simulator using these libraries as its parts. These libraries make it possible to shorten the development period. In this paper, We mainly describe about a geometry library which is one of the most important in process simulator. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | process / simulation / software development / geometry |
Paper # | ICD97-130 |
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Committee | ICD |
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Conference Date | 1997/9/25(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Minimization Scheme for a period of Process Simulator Development in TCAD : Development of Simulation Standard Libraries and an Application |
Sub Title (in English) | |
Keyword(1) | process |
Keyword(2) | simulation |
Keyword(3) | software development |
Keyword(4) | geometry |
1st Author's Name | Mitsutoshi Nakamura |
1st Author's Affiliation | Microelectronics Engineering Laboratory, TOSHIBA Corporation() |
2nd Author's Name | Takahiro Nakauchi |
2nd Author's Affiliation | Microelectronics Engineering Laboratory, TOSHIBA Corporation:Semiconductor DA & Test Engineering Center, TOSHIBA Corporation |
3rd Author's Name | Toshikazu Fukuda |
3rd Author's Affiliation | Microelectronics Engineering Laboratory, TOSHIBA Corporation:Semiconductor DA & Test Engineering Center, TOSHIBA Corporation |
4th Author's Name | Naoki Kusunoki |
4th Author's Affiliation | Microelectronics Engineering Laboratory, TOSHIBA Corporation |
5th Author's Name | Takahisa Kanemura |
5th Author's Affiliation | Microelectronics Engineering Laboratory, TOSHIBA Corporation |
6th Author's Name | Sanae Fukuda |
6th Author's Affiliation | Microelectronics Engineering Laboratory, TOSHIBA Corporation |
Date | 1997/9/25 |
Paper # | ICD97-130 |
Volume (vol) | vol.97 |
Number (no) | 274 |
Page | pp.pp.- |
#Pages | 8 |
Date of Issue |