Presentation | 1997/8/22 Prototype Chips of the Analog Convolution Circuits with Floating Gate Transistors Takeyasu Sakai, Hiromasa Nagai, Takashi Kunishima, Takashi Matsumoto, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | The intelligent sensor is known as an architecture which can perform fast parallel image processing. An unit operation circuitry for intelligent sensors must take small areas and lower power dissipation, then we have considered of the differential amplifier with floating gate transistors. In particular, if DCT is implemented with this circuitry together with an array of photosensors, image compression sensor can be realized. In this report, we explain about the differential amplifier, its application, and prototype chip which is now under fabrication. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | intelligent sensor / image compression / DCT / vision chip / floating gate |
Paper # | ICD97-116 |
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Committee | ICD |
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Conference Date | 1997/8/22(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Prototype Chips of the Analog Convolution Circuits with Floating Gate Transistors |
Sub Title (in English) | |
Keyword(1) | intelligent sensor |
Keyword(2) | image compression |
Keyword(3) | DCT |
Keyword(4) | vision chip |
Keyword(5) | floating gate |
1st Author's Name | Takeyasu Sakai |
1st Author's Affiliation | Electronic Navigation Research Institute, Ministry of Transport() |
2nd Author's Name | Hiromasa Nagai |
2nd Author's Affiliation | Department of Electrical, Electronics and computer Engineering, Waseda University |
3rd Author's Name | Takashi Kunishima |
3rd Author's Affiliation | Department of Electrical, Electronics and computer Engineering, Waseda University |
4th Author's Name | Takashi Matsumoto |
4th Author's Affiliation | Department of Electrical, Electronics and computer Engineering, Waseda University |
Date | 1997/8/22 |
Paper # | ICD97-116 |
Volume (vol) | vol.97 |
Number (no) | 230 |
Page | pp.pp.- |
#Pages | 7 |
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