Presentation 1997/6/20
Performance of p-channel HJFET with Selectively Grown Contact Layers
Naoki FURUHATA, Shuji ASAI, Tadashi MAEDA, Masahiro FUJII, Yasuo OHNO,
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Abstract(in English) This paper reports on performance of 0.5μm gate p-channel HJFET for GaAs complementary ICs. The device structure consists of i-Al_<0.75>Ga_<0.25>As barrier layer, p-GaAs(2×10^<18>cm^<-3>) channel layer and p^+-GaAs(2×10^<20>cm^<-3>) contact layers. The contact layers were selectively grown by MOMBE. This device achieved gm_ of 40mS/mm, Vf of -0.9V, BVg of 6.0V, f_T of 6.8GHz and fmax of 7.0GHz. To estimate GaAs complementary ICs performances, a delay time and power consumption were simulated by SPICE. As a result, t_ of 120ps and 0.09μW/MHz/gate power consumption at V_
of 1.0V were obtained.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) GaAs complementary ICs / p-channel HJFET / MOMBE / SPICE / low power consumption
Paper # ED97-63
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Conference Date 1997/6/20(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Performance of p-channel HJFET with Selectively Grown Contact Layers
Sub Title (in English)
Keyword(1) GaAs complementary ICs
Keyword(2) p-channel HJFET
Keyword(3) MOMBE
Keyword(4) SPICE
Keyword(5) low power consumption
1st Author's Name Naoki FURUHATA
1st Author's Affiliation NEC Opto-Electronics Research Laboratories()
2nd Author's Name Shuji ASAI
2nd Author's Affiliation NEC ULSI Device Development Laboratories
3rd Author's Name Tadashi MAEDA
3rd Author's Affiliation NEC Opto-Electronics Research Laboratories
4th Author's Name Masahiro FUJII
4th Author's Affiliation NEC Opto-Electronics Research Laboratories
5th Author's Name Yasuo OHNO
5th Author's Affiliation NEC Opto-Electronics Research Laboratories
Date 1997/6/20
Paper # ED97-63
Volume (vol) vol.97
Number (no) 111
Page pp.pp.-
#Pages 7
Date of Issue