| Presentation | 1997/6/20 High-speed Low-power SDH Regenerator Section Terminating LSI Keiichi KOIKE, Kenji KAWAI, Yuichiro TAKEI, Akira ONOZAWA, Hitoshi OBARA, Haruhiko ICHINO, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | An SDH regenerator section terminating LSI operating at 2.5Gb/s has been developed by 0.5μm Si bipolar technology SST-1C. For low-power demands, following design methods are applied. (1) Power management logic design which provides an occasional operation by cutting the current supplies for low ON rate blocks, (2) 2.5V-ECL circuit which enables high-speed and low-power opration, (3) Power optimizing CAD maintaining circuit performance by minimizing the cell currents under the path delay constraints. The fabricated LSI which consumes only 557mW, 1/10 of the conventional chips, demonstrates the effectiveness of these design methods. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Si bipolar / ECL / standard cell / SST / SDH / STM-l6 / CAD |
| Paper # | ED97-59 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1997/6/20(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | High-speed Low-power SDH Regenerator Section Terminating LSI |
| Sub Title (in English) | |
| Keyword(1) | Si bipolar |
| Keyword(2) | ECL |
| Keyword(3) | standard cell |
| Keyword(4) | SST |
| Keyword(5) | SDH |
| Keyword(6) | STM-l6 |
| Keyword(7) | CAD |
| 1st Author's Name | Keiichi KOIKE |
| 1st Author's Affiliation | NTT System Electronics Laboratories() |
| 2nd Author's Name | Kenji KAWAI |
| 2nd Author's Affiliation | NTT Optical Network Systems Laboratories |
| 3rd Author's Name | Yuichiro TAKEI |
| 3rd Author's Affiliation | NTT System Electronics Laboratories |
| 4th Author's Name | Akira ONOZAWA |
| 4th Author's Affiliation | NTT Multimedia Networks Laboratories |
| 5th Author's Name | Hitoshi OBARA |
| 5th Author's Affiliation | NTT Optical Network Systems Laboratories |
| 6th Author's Name | Haruhiko ICHINO |
| 6th Author's Affiliation | NTT Optical Network Systems Laboratories |
| Date | 1997/6/20 |
| Paper # | ED97-59 |
| Volume (vol) | vol.97 |
| Number (no) | 111 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |