| Presentation | 1997/5/22 A 1V 46ns 16Mbit SOI-DRAM with Body Control Technique Ken'ichi Shimomura, Hiroki Shimano, Narumi Sakashita, Fumihiro Okuda, Toshiyuki Oashi, Yasuo Yamaguchi, Kazutami Arimoto, Shinji Komori, Kazuo Kyuma, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper describes key design techniques in a 16Mbit SOI-DRAM which has achieved 46ns RAS access time at 1V power supply by utilizing transistor operation mode transition. SOI devices are inherently equipped with features suitable for low voltage and low power operation. In addition to these merits, we have optimized its device structure so that it is enabled to switch operation mode between fully-depleted and partially-depleted. By applying this operation-mode-transition not only to the peripheral logic but to the analog portion including sense amplifiers, a fast access time of 46ns has been achieved. By keeping the access time comparable to the current standard DRAM even at 1V power supply, we are expecting that the DRAM market will extend to portable information systems. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | DRAM / SOI / Body Bias Control / Fully-Depleted / Partially-Depleted |
| Paper # | ICD97-20 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
|---|---|
| Conference Date | 1997/5/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A 1V 46ns 16Mbit SOI-DRAM with Body Control Technique |
| Sub Title (in English) | |
| Keyword(1) | DRAM |
| Keyword(2) | SOI |
| Keyword(3) | Body Bias Control |
| Keyword(4) | Fully-Depleted |
| Keyword(5) | Partially-Depleted |
| 1st Author's Name | Ken'ichi Shimomura |
| 1st Author's Affiliation | Advanced Technology R&D Center Mitsubishi Electric Corporation() |
| 2nd Author's Name | Hiroki Shimano |
| 2nd Author's Affiliation | Advanced Technology R&D Center Mitsubishi Electric Corporation |
| 3rd Author's Name | Narumi Sakashita |
| 3rd Author's Affiliation | Advanced Technology R&D Center Mitsubishi Electric Corporation |
| 4th Author's Name | Fumihiro Okuda |
| 4th Author's Affiliation | LTEC Corporation |
| 5th Author's Name | Toshiyuki Oashi |
| 5th Author's Affiliation | ULSI Laboratory Mitsubishi Electric Corporation |
| 6th Author's Name | Yasuo Yamaguchi |
| 6th Author's Affiliation | ULSI Laboratory Mitsubishi Electric Corporation |
| 7th Author's Name | Kazutami Arimoto |
| 7th Author's Affiliation | ULSI Laboratory Mitsubishi Electric Corporation |
| 8th Author's Name | Shinji Komori |
| 8th Author's Affiliation | Advanced Technology R&D Center Mitsubishi Electric Corporation |
| 9th Author's Name | Kazuo Kyuma |
| 9th Author's Affiliation | Advanced Technology R&D Center Mitsubishi Electric Corporation |
| Date | 1997/5/22 |
| Paper # | ICD97-20 |
| Volume (vol) | vol.97 |
| Number (no) | 56 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |