Presentation | 2001/9/21 A Dummy Pattern Design System Based on A CMP Model Toshiyuki Ohta, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | A dummy pattern design system based on a CMP model is developed to reduce the global thickness variation by CMP process. Input data are GDS II formatted which is standard of LSI design. It is found that effective design has become possible because this system cooperates pattern density calculations, CMP simulations, graphics, and dummy pattern design through GUI. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | CMP / Dummy Pattern / Simulation / LSI Design |
Paper # | VLD2001-75,SDM2001-149 |
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Conference Information | |
Committee | SDM |
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Conference Date | 2001/9/21(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Silicon Device and Materials (SDM) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Dummy Pattern Design System Based on A CMP Model |
Sub Title (in English) | |
Keyword(1) | CMP |
Keyword(2) | Dummy Pattern |
Keyword(3) | Simulation |
Keyword(4) | LSI Design |
1st Author's Name | Toshiyuki Ohta |
1st Author's Affiliation | Semiconductor Leading Edge Technologies, Inc.() |
Date | 2001/9/21 |
Paper # | VLD2001-75,SDM2001-149 |
Volume (vol) | vol.101 |
Number (no) | 321 |
Page | pp.pp.- |
#Pages | 5 |
Date of Issue |