| Presentation | 2001/3/5 Fabrication and Electrical Properties of Ferroelectric-gate FET with Epitaxial Gate Structure S. Migita, K. Sakamaki, S.-B. Xiong, H. Ota, Y. Tarui, S. Sakai, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | An epitaxially stacked gate structure is formed by a pulsed laser deposition method and applied to the ferroelectric-gate FET memory. A ferroelectric SrBi_2Ta_2O_9 film on Si(001) via insulating SrTiO_3/Ce_<0.12>Zr_<0.88>O_2 layers is grown in an epitaxial manner with its c-axis inclined 45° to the substrate normal. Electrical measurements for the MFIS diode show memory property caused by the reinanent polarization of the ferroelectric and retention time longer than 10 days. Memory property is also confirmed in an MFIS-FET with retention time longer than 2 hours. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | ferroelectric / transistor / memory / epitaxy / silicon |
| Paper # | SDM2000-234 |
| Date of Issue |
| Conference Information | |
| Committee | SDM |
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| Conference Date | 2001/3/5(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Fabrication and Electrical Properties of Ferroelectric-gate FET with Epitaxial Gate Structure |
| Sub Title (in English) | |
| Keyword(1) | ferroelectric |
| Keyword(2) | transistor |
| Keyword(3) | memory |
| Keyword(4) | epitaxy |
| Keyword(5) | silicon |
| 1st Author's Name | S. Migita |
| 1st Author's Affiliation | Electrotechnical Laboratory() |
| 2nd Author's Name | K. Sakamaki |
| 2nd Author's Affiliation | Nippon Precision Circuits Inc. |
| 3rd Author's Name | S.-B. Xiong |
| 3rd Author's Affiliation | Electrotechnical Laboratory |
| 4th Author's Name | H. Ota |
| 4th Author's Affiliation | Electrotechnical Laboratory |
| 5th Author's Name | Y. Tarui |
| 5th Author's Affiliation | Electrotechnical Laboratory |
| 6th Author's Name | S. Sakai |
| 6th Author's Affiliation | Electrotechnical Laboratory |
| Date | 2001/3/5 |
| Paper # | SDM2000-234 |
| Volume (vol) | vol.100 |
| Number (no) | 652 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |