Presentation 2001/3/5
Preparation of (Bi,La)_4Ti_3O_<12> Films by the Sol-Gel Technique and Application to the MFMIS Structures.
Takeaki Isobe, Eisuke Tokumitsu, Takeshi Kijima, Hiroshi Ishiwara,
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Abstract(in English) Recently, ferroelectric memory have attracted much attention for volatile memory. In this work, we prepared (Bi,La)_4Ti_3O_<12>(BLT) films on Pt/Ti/SiO_2/Si substrates by the sol-gel technique. We found that partially replacing Bi with La in the (Bi,La)_4Ti_3O_<12> films reduce the crystallization temperature and enhance the electrical characteristics. By optimizing the excess Bi composition in the source solution, excellent ferroelectric properties(Pr=15μC/cm^2,Ec=100kV/cm) were obtained. Furthermore, we fabricated MFMIS structures with good electrical properties.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) (Bi,La)_4Ti_3O_<12> / MFMIS / ferroelectric-gate FET
Paper # SDM2000-231
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Committee SDM
Conference Date 2001/3/5(1days)
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Registration To Silicon Device and Materials (SDM)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Preparation of (Bi,La)_4Ti_3O_<12> Films by the Sol-Gel Technique and Application to the MFMIS Structures.
Sub Title (in English)
Keyword(1) (Bi,La)_4Ti_3O_<12>
Keyword(2) MFMIS
Keyword(3) ferroelectric-gate FET
1st Author's Name Takeaki Isobe
1st Author's Affiliation Tokyo Institute of Technology, Precision and Intelligence Laboratory()
2nd Author's Name Eisuke Tokumitsu
2nd Author's Affiliation Tokyo Institute of Technology, Precision and Intelligence Laboratory
3rd Author's Name Takeshi Kijima
3rd Author's Affiliation Tokyo Institute of Technology, Frontier Collaborative Research Center
4th Author's Name Hiroshi Ishiwara
4th Author's Affiliation Tokyo Institute of Technology, Frontier Collaborative Research Center
Date 2001/3/5
Paper # SDM2000-231
Volume (vol) vol.100
Number (no) 652
Page pp.pp.-
#Pages 6
Date of Issue