| Presentation | 2001/2/22 Optimization and Application of GaAs-based Quantum Wire Transistors Utilizing Schottky In-Plane Gates and Wrap Gates Miki Yumoto, Masanobu Iwaya, Seiya Kasai, Hideki Hasegawa, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Basic device characteristics GaAs Schottky in-plane gate(IPG)- and wrap gate(WPG)-based quantum wire transistors were investigated, and the device structures were optimized for their integrated circuit applications. The gate controllability in each gate structure including the gate-voltage dependence of effective wire width was characterized by current-voltage and magnetoresistance measurements. The control of conductance step characteristics and the threshold voltage in the IPG/WPG quantum wire transistors were also discussed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | quantum wire transistor / Schottky junction / in-plane gate(IPG) / wrap gate(WPG) / conductance quantization |
| Paper # | ED2000-264,SDM2000-218 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 2001/2/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Optimization and Application of GaAs-based Quantum Wire Transistors Utilizing Schottky In-Plane Gates and Wrap Gates |
| Sub Title (in English) | |
| Keyword(1) | quantum wire transistor |
| Keyword(2) | Schottky junction |
| Keyword(3) | in-plane gate(IPG) |
| Keyword(4) | wrap gate(WPG) |
| Keyword(5) | conductance quantization |
| 1st Author's Name | Miki Yumoto |
| 1st Author's Affiliation | Research Center for Interface Quantum Electronics, Hokkaido University:Graduate School of Electronics and Information Engineering, Hokkaido University() |
| 2nd Author's Name | Masanobu Iwaya |
| 2nd Author's Affiliation | Research Center for Interface Quantum Electronics, Hokkaido University:Graduate School of Electronics and Information Engineering, Hokkaido University |
| 3rd Author's Name | Seiya Kasai |
| 3rd Author's Affiliation | Research Center for Interface Quantum Electronics, Hokkaido University:Graduate School of Electronics and Information Engineering, Hokkaido University |
| 4th Author's Name | Hideki Hasegawa |
| 4th Author's Affiliation | Research Center for Interface Quantum Electronics, Hokkaido University:Graduate School of Electronics and Information Engineering, Hokkaido University |
| Date | 2001/2/22 |
| Paper # | ED2000-264,SDM2000-218 |
| Volume (vol) | vol.100 |
| Number (no) | 644 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |