Presentation | 2001/2/21 Effects of Dot Size and its Distribution on Electron Number Control and Distribution of Potential in MOSFET Memories Based on Silicon Nanocrystal Floating Dots Haining Wang, Hideaki Majima, Takashi Inukai, Hiroyuki Gomyo, Masumi Saitoh, Toshiro Hiramoto, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Effects of dot size and dot size distribution on electron number control in silicon floating dot memories at room temperature are investigated by numerical calculation. As the dot size increases and the size distribution increases, the staircase feature disappears due to the averaging effects. It is found that, to obtain a distinct staircase feature, the size distribution should be less than 7% for the 8-nm-diameter dot size and 12% for the 3-nm-diameter dot. These results provide good guidelines for setting device parameters for fabricating silicon floating dot memories. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Coulomb blockade / silicon nanocrystal floating dot / dot size distribution / room temperature / MOSFET / single electron |
Paper # | ED2000-258,SDM2000-212 |
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Committee | SDM |
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Conference Date | 2001/2/21(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Silicon Device and Materials (SDM) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Effects of Dot Size and its Distribution on Electron Number Control and Distribution of Potential in MOSFET Memories Based on Silicon Nanocrystal Floating Dots |
Sub Title (in English) | |
Keyword(1) | Coulomb blockade |
Keyword(2) | silicon nanocrystal floating dot |
Keyword(3) | dot size distribution |
Keyword(4) | room temperature |
Keyword(5) | MOSFET |
Keyword(6) | single electron |
1st Author's Name | Haining Wang |
1st Author's Affiliation | Institute of Industrial Science, University of Tokyo() |
2nd Author's Name | Hideaki Majima |
2nd Author's Affiliation | Institute of Industrial Science, University of Tokyo |
3rd Author's Name | Takashi Inukai |
3rd Author's Affiliation | Institute of Industrial Science, University of Tokyo |
4th Author's Name | Hiroyuki Gomyo |
4th Author's Affiliation | Institute of Industrial Science, University of Tokyo |
5th Author's Name | Masumi Saitoh |
5th Author's Affiliation | Institute of Industrial Science, University of Tokyo |
6th Author's Name | Toshiro Hiramoto |
6th Author's Affiliation | Institute of Industrial Science, University of Tokyo:VLSI Design and Education Center, University of Tokyo:CREST, Japan Science and Technology Corporation(JST) |
Date | 2001/2/21 |
Paper # | ED2000-258,SDM2000-212 |
Volume (vol) | vol.100 |
Number (no) | 643 |
Page | pp.pp.- |
#Pages | 5 |
Date of Issue |