Presentation 2001/2/21
Electron charging characteristics and memory function of silicon quantum-dot floating gate MOS structures
Atsushi Kohno, Mitsuhisa Ikeda, Hideki Murakami, Seiichi Miyazaki, Masataka Hirose,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) Metal-oxide-semiconductor(MOS)structures with silicon quantum-dots(QDs)embedded in the gate oxide as a floating gate have been designed and fabricated, and their memory operation has been demonstrated at room temperature. The unique hysteresis and the current bumps in drain current versus gate voltage characteristics of QD floating gate MOS field-effect transistors(FETs)have been interpreted in terms of the electron charging to the QD floating gate. From the analysis of the transient drain-current characteristics for a single-pulse gate bias, we also confirm that the electron charging of QDs takes place to be multiple stages until reaching the stable state for one electron per dot.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) silicon quantum-dot / floating gate / memory / electron charging / threshold voltage shift
Paper # ED2000-257,SDM2000-211
Date of Issue

Conference Information
Committee SDM
Conference Date 2001/2/21(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Silicon Device and Materials (SDM)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Electron charging characteristics and memory function of silicon quantum-dot floating gate MOS structures
Sub Title (in English)
Keyword(1) silicon quantum-dot
Keyword(2) floating gate
Keyword(3) memory
Keyword(4) electron charging
Keyword(5) threshold voltage shift
1st Author's Name Atsushi Kohno
1st Author's Affiliation Department of Aplied Physics, Fukuoka University()
2nd Author's Name Mitsuhisa Ikeda
2nd Author's Affiliation Department of Electrical Engineering, Hiroshima University
3rd Author's Name Hideki Murakami
3rd Author's Affiliation Department of Electrical Engineering, Hiroshima University
4th Author's Name Seiichi Miyazaki
4th Author's Affiliation Department of Electrical Engineering, Hiroshima University
5th Author's Name Masataka Hirose
5th Author's Affiliation Department of Electrical Engineering, Hiroshima University
Date 2001/2/21
Paper # ED2000-257,SDM2000-211
Volume (vol) vol.100
Number (no) 643
Page pp.pp.-
#Pages 6
Date of Issue