Presentation 2000/9/15
Changed Charge Partitioning for sub-100nm MOSFET due to Ballistic Transport
T. Okagaki, M. Tanaka, H. Ueno, M. Miura-Mattausch,
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Abstract(in English) This paper demonstrates that ballistic carriers change inversion-charge partitioning between source and drain during switch-off of MOSFET with sub-100nm channel length. We calculated transient current responses by using Monte Carlo simulation and estimated contribution of ballistic carriers to switching charcteristics. The ratio of carriers flow to drain in 40nm MOSFET is larger than that in conventional one because the ration of ballistic carriers increase with decreasing of channel length. This will result in more impact on switching-time than expected from channel length reduction.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) ballistic transport / sub-100nm MOSFET / charge partitioning / carrier pinning
Paper # VLD2000-65,SDM2000-138
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Committee SDM
Conference Date 2000/9/15(1days)
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Paper Information
Registration To Silicon Device and Materials (SDM)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Changed Charge Partitioning for sub-100nm MOSFET due to Ballistic Transport
Sub Title (in English)
Keyword(1) ballistic transport
Keyword(2) sub-100nm MOSFET
Keyword(3) charge partitioning
Keyword(4) carrier pinning
1st Author's Name T. Okagaki
1st Author's Affiliation Graduate School of Advanced Science of Matter, Hiroshima University()
2nd Author's Name M. Tanaka
2nd Author's Affiliation Graduate School of Advanced Science of Matter, Hiroshima University
3rd Author's Name H. Ueno
3rd Author's Affiliation Graduate School of Advanced Science of Matter, Hiroshima University
4th Author's Name M. Miura-Mattausch
4th Author's Affiliation Graduate School of Advanced Science of Matter, Hiroshima University
Date 2000/9/15
Paper # VLD2000-65,SDM2000-138
Volume (vol) vol.100
Number (no) 296
Page pp.pp.-
#Pages 5
Date of Issue