| Presentation | 1999/7/23 Stress in Inter-level Dielectric Oxides on Integrated SBT-based Ferroelectric Memories Suk-Kyoung Hong, Yong Ku Baek, B Yang, Young Min Kang, Chang Goo Lee, Chung Won Suh, Nam Soo Kang, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Effects of thermal stress in interlayer dielectrics on the electrical properties of ferroelectric SBT-based capacitor have been investigated. Tetraethylorthosilicate (TEOS) undoped silicon oxide (USG) or/and tetraethylorthosilicate-O_3 (TEOS-O_3) borophosphosilicate glass (BPSG). The electrical properties were measured in the integrated capacitors covered with the dielectrics, after reactive ion etching for contact holes followed by recovery anneal at 700℃ and then Al metallization. The capacitors covered with the single layer of USG show electrically short failure in especially array of small-sized capacitor with a storage node less than 10×10μm^2. Improvement in the electrical properties was achieved through the stress control in dielectric layers using double layers consisting of TEOS-based USG and TEOS-O_3-based BPSG. The stress optimization by means of thickness changes in the dielectric layers results in high enough remanent polarization (>15 μC/cm^2) and low leakage current (<8×10^<-7> A/cm^2) measured at 3V. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SBT / ferroelectric capacitor / interlayer dielectrics / TEOS / stress |
| Paper # | SDM99-114 |
| Date of Issue |
| Conference Information | |
| Committee | SDM |
|---|---|
| Conference Date | 1999/7/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
|---|---|
| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Stress in Inter-level Dielectric Oxides on Integrated SBT-based Ferroelectric Memories |
| Sub Title (in English) | |
| Keyword(1) | SBT |
| Keyword(2) | ferroelectric capacitor |
| Keyword(3) | interlayer dielectrics |
| Keyword(4) | TEOS |
| Keyword(5) | stress |
| 1st Author's Name | Suk-Kyoung Hong |
| 1st Author's Affiliation | Ferroelectric Technology Department, Hyundai Electronics Industries Co., Ltd.() |
| 2nd Author's Name | Yong Ku Baek |
| 2nd Author's Affiliation | Ferroelectric Technology Department, Hyundai Electronics Industries Co., Ltd. |
| 3rd Author's Name | B Yang |
| 3rd Author's Affiliation | Ferroelectric Technology Department, Hyundai Electronics Industries Co., Ltd. |
| 4th Author's Name | Young Min Kang |
| 4th Author's Affiliation | Ferroelectric Technology Department, Hyundai Electronics Industries Co., Ltd. |
| 5th Author's Name | Chang Goo Lee |
| 5th Author's Affiliation | Ferroelectric Technology Department, Hyundai Electronics Industries Co., Ltd. |
| 6th Author's Name | Chung Won Suh |
| 6th Author's Affiliation | Ferroelectric Technology Department, Hyundai Electronics Industries Co., Ltd. |
| 7th Author's Name | Nam Soo Kang |
| 7th Author's Affiliation | Ferroelectric Technology Department, Hyundai Electronics Industries Co., Ltd. |
| Date | 1999/7/23 |
| Paper # | SDM99-114 |
| Volume (vol) | vol.99 |
| Number (no) | 232 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |