| Presentation | 1999/7/23 Simple Formulas for Interconnect Delay and Crosstalk Considering the Transition Time of Ramp Signals Jae-Kyung Wee, Chang-Hyuk Lee, Seong-Hoon Lee, Joo-Sun Choi, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A analytical formula is proposed for the delay of the distributed RC interconnect line driven by an input waveform having a finite transition time for the first time. Formulas for crosstalk noise between two capacitive coupling lines are derived from the formula for the delay. The formulas for the delay and crosstalk noise are applied to several conditions under transition times, interconnect lengths and buffer sizes. The results are compared with SPICE simulations. Through this work, it is found that the derived closed-form formulas are well agreed with SPICE simulations so that they will be useful for the estimation of delays and crosstalks of long interconnect lines in VLSI circuits. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | |
| Paper # | SDM99-92 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 1999/7/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Simple Formulas for Interconnect Delay and Crosstalk Considering the Transition Time of Ramp Signals |
| Sub Title (in English) | |
| Keyword(1) | |
| 1st Author's Name | Jae-Kyung Wee |
| 1st Author's Affiliation | DRAM Design, Memory Product & Technology Development Division, Hyundai-Electronics Industries() |
| 2nd Author's Name | Chang-Hyuk Lee |
| 2nd Author's Affiliation | DRAM Design, Memory Product & Technology Development Division, Hyundai-Electronics Industries |
| 3rd Author's Name | Seong-Hoon Lee |
| 3rd Author's Affiliation | DRAM Design, Memory Product & Technology Development Division, Hyundai-Electronics Industries |
| 4th Author's Name | Joo-Sun Choi |
| 4th Author's Affiliation | DRAM Design, Memory Product & Technology Development Division, Hyundai-Electronics Industries |
| Date | 1999/7/23 |
| Paper # | SDM99-92 |
| Volume (vol) | vol.99 |
| Number (no) | 232 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |