| Presentation | 1999/7/23 Development of New Etching Algorithm for Ultra Large Scale Integrated Circuit and Application of ICP (Inductive Coupled Plasma) Etcher Young-Chig Lee, Su-Hyun Park, Myung-Sik Son, Joong-Won Kang, Oh-Keun Kwon, Ki-Ryang Byun, Ho-Jung Hwang, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, we proposed new etching algorithm for ultra-large scale integrated circuit device and simulated etching process using the proposed algorithm in the case of ICP(inductive coupled plasma) source. Until now, algorithms for etching process simulation have been Cell remove algorithm, String algorithm and Ray algorithm. These algorithms have several drawbacks due to analytic function, these algorithms are not appropriate for sub 0.1 μm device technologies which should deal with each ion. In order to apply ULSI process simulation, algorithm considering above mentioned interactions at the same time is needed. Proposed algorithm calculates interactions both in plasma source region and in target material region, and uses BCA (binary collision approximation) method when ion impacts on target material surface. Proposed algorithm considers the interaction between source ion and another ion in sheath region (from Quartz region to substrate region). After collision between target and ion, reflected ion collides next projectile ion or sputtered atoms. In ICP etching, because the main mechanism is sputtering, both SiO_2 and Si can be etched. Therefore, to obtain etching profiles, mask thickness and composition must be considered. Since we consider both SiO_2 and Si etching, it is possible to predict the thickness of SiO_2 for etching of ULSI. |
| Keyword(in Japanese) | (See Japanese page) |
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| Paper # | SDM99-88 |
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| Committee | SDM |
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| Conference Date | 1999/7/23(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Silicon Device and Materials (SDM) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Development of New Etching Algorithm for Ultra Large Scale Integrated Circuit and Application of ICP (Inductive Coupled Plasma) Etcher |
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| 1st Author's Name | Young-Chig Lee |
| 1st Author's Affiliation | Semiconductor Process and Device Lab,, Dept. of Electronic Engineering, Chung-Ang Univ.() |
| 2nd Author's Name | Su-Hyun Park |
| 2nd Author's Affiliation | Semiconductor Process and Device Lab,, Dept. of Electronic Engineering, Chung-Ang Univ. |
| 3rd Author's Name | Myung-Sik Son |
| 3rd Author's Affiliation | Semiconductor Process and Device Lab,, Dept. of Electronic Engineering, Chung-Ang Univ. |
| 4th Author's Name | Joong-Won Kang |
| 4th Author's Affiliation | Semiconductor Process and Device Lab,, Dept. of Electronic Engineering, Chung-Ang Univ. |
| 5th Author's Name | Oh-Keun Kwon |
| 5th Author's Affiliation | Semiconductor Process and Device Lab,, Dept. of Electronic Engineering, Chung-Ang Univ. |
| 6th Author's Name | Ki-Ryang Byun |
| 6th Author's Affiliation | Semiconductor Process and Device Lab,, Dept. of Electronic Engineering, Chung-Ang Univ. |
| 7th Author's Name | Ho-Jung Hwang |
| 7th Author's Affiliation | Semiconductor Process and Device Lab,, Dept. of Electronic Engineering, Chung-Ang Univ. |
| Date | 1999/7/23 |
| Paper # | SDM99-88 |
| Volume (vol) | vol.99 |
| Number (no) | 232 |
| Page | pp.pp.- |
| #Pages | 5 |
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