Presentation | 1998/10/22 A Statistical Gate CD Control including OPC Akio Misaka, Akihiko Goda, shinji Odanaka, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | A new statistical methodology including a pattern bias OPC is developed for controlling the gate CD variation at CMOS cell level. The gate CD variation at cell level in the KrF lithography is estimated by using the method. It is shown that the gate CD variation at cell level is significantly decreased by introducing both OPC and annular illumination with a halftone phase shift mask(PSM). |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Gate CD / Optical proximity correction / Resolution enhancement technology / CD variation |
Paper # | VLD98-77,ED98-102,SDM98-138,ICD98-208 |
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Conference Information | |
Committee | SDM |
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Conference Date | 1998/10/22(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Silicon Device and Materials (SDM) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Statistical Gate CD Control including OPC |
Sub Title (in English) | |
Keyword(1) | Gate CD |
Keyword(2) | Optical proximity correction |
Keyword(3) | Resolution enhancement technology |
Keyword(4) | CD variation |
1st Author's Name | Akio Misaka |
1st Author's Affiliation | ULSI Process Technology Development Center, Matsushita Electronics Corporation() |
2nd Author's Name | Akihiko Goda |
2nd Author's Affiliation | ULSI Process Technology Development Center, Matsushita Electronics Corporation |
3rd Author's Name | shinji Odanaka |
3rd Author's Affiliation | ULSI Process Technology Development Center, Matsushita Electronics Corporation |
Date | 1998/10/22 |
Paper # | VLD98-77,ED98-102,SDM98-138,ICD98-208 |
Volume (vol) | vol.98 |
Number (no) | 349 |
Page | pp.pp.- |
#Pages | 8 |
Date of Issue |