| Presentation | 1998/10/22 A New Method for Calculating One-dimensional Process Margin in Consideration of Process Variation Tadashi Miwa, Tomonobu Noda, Tatuo Akiyama, Shigeki Sugimoto, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The yield and device characteristics in LSI have become more sensitive to their process variation, as the design rule is more shrinked and larger wafer is used. So the process variation such as between and within wafers should be taken account in process integration to eliminate yield loss. But actually it's difficult to make experiment which can cover possible variations all in process because of cost and time. That's why some calculation method have been required recently. In this paper, we report a new method for calculating one-dimensional(vertical direction such as etching and deposition)process margin in consideration of process variation using Monte Carlo simulation. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | process margin / process variation / Monte Carlo method / simulation |
| Paper # | VLD98-74,ED98-99,SDM98-135,ICD98-205 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 1998/10/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A New Method for Calculating One-dimensional Process Margin in Consideration of Process Variation |
| Sub Title (in English) | |
| Keyword(1) | process margin |
| Keyword(2) | process variation |
| Keyword(3) | Monte Carlo method |
| Keyword(4) | simulation |
| 1st Author's Name | Tadashi Miwa |
| 1st Author's Affiliation | Semiconductor Manufacturing Engineering Center, Toshiba Corporation() |
| 2nd Author's Name | Tomonobu Noda |
| 2nd Author's Affiliation | Semiconductor Manufacturing Engineering Center, Toshiba Corporation |
| 3rd Author's Name | Tatuo Akiyama |
| 3rd Author's Affiliation | Semiconductor Manufacturing Engineering Center, Toshiba Corporation |
| 4th Author's Name | Shigeki Sugimoto |
| 4th Author's Affiliation | Semiconductor Manufacturing Engineering Center, Toshiba Corporation |
| Date | 1998/10/22 |
| Paper # | VLD98-74,ED98-99,SDM98-135,ICD98-205 |
| Volume (vol) | vol.98 |
| Number (no) | 349 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |