| Presentation | 1993/11/26 Design of a Bit-Parallel Block-Parallel Functional Memory Type Parallel Processor Kazutoshi Kobayashi, Hideki Takemura, Wasarin Jungurradee, Hidetoshi Onodera, Keikichi Tamaru, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | There has been proposed functionl Memory type Parallel Processor (FMPP) architecture,which receives a direct benefit from the development of the technology of large scale integration with using memory-based simple regular array structure.We have proposed an architecture called bit-parallel block-parallel(BPBP)FMPP.The BPBP FMPP has a large number of "block"s including a few words.A b lock executes some simple operations(addition,or logical operation).Now,we are designing a chip under the BPBP FMPP architecture.In this paper,we describe the BPBP FMPP architecture, some applications,and the chip. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Functional Memory / Parallel Processor / SIMD / DCT |
| Paper # | SDM93-145,ICD93-139 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 1993/11/26(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design of a Bit-Parallel Block-Parallel Functional Memory Type Parallel Processor |
| Sub Title (in English) | |
| Keyword(1) | Functional Memory |
| Keyword(2) | Parallel Processor |
| Keyword(3) | SIMD |
| Keyword(4) | DCT |
| 1st Author's Name | Kazutoshi Kobayashi |
| 1st Author's Affiliation | Department of Electronics,Faculty of Engineering,Kyoto University() |
| 2nd Author's Name | Hideki Takemura |
| 2nd Author's Affiliation | Department of Electronics,Faculty of Engineering,Kyoto University |
| 3rd Author's Name | Wasarin Jungurradee |
| 3rd Author's Affiliation | Department of Electronics,Faculty of Engineering,Kyoto University |
| 4th Author's Name | Hidetoshi Onodera |
| 4th Author's Affiliation | Department of Electronics,Faculty of Engineering,Kyoto University |
| 5th Author's Name | Keikichi Tamaru |
| 5th Author's Affiliation | Department of Electronics,Faculty of Engineering,Kyoto University |
| Date | 1993/11/26 |
| Paper # | SDM93-145,ICD93-139 |
| Volume (vol) | vol.93 |
| Number (no) | 349 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |