| Presentation | 1993/11/26 Efficient Test Scheme for Embedded Multi-port RAMs Tsuneo Matsumura, Nobutaro Shibata, Tatsuo Baba, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | It is required for multi-port RAMs to check data read, write marginal operation in addition to the functional memory test. Conventional test schemes are inefficient,because the data read/ write marginal test,which uses several test patterns for memory operation through each port,was done apart from the functional memory test. To achieve efficient test scheme for embedded multi-port RAMS,a novel test pattern,which makes two kinds of test mentioned above concurrently and enables memory operation through whole ports at a time,has been proposed.This test pattern is generated by the BIST circuits,that have less area penalty. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | embedded memory / multi-port memory / functional test / data read/rite marginal test / built-in self test(BIST) |
| Paper # | SDM93-140,ICD93-134 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 1993/11/26(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Efficient Test Scheme for Embedded Multi-port RAMs |
| Sub Title (in English) | |
| Keyword(1) | embedded memory |
| Keyword(2) | multi-port memory |
| Keyword(3) | functional test |
| Keyword(4) | data read/rite marginal test |
| Keyword(5) | built-in self test(BIST) |
| 1st Author's Name | Tsuneo Matsumura |
| 1st Author's Affiliation | NTT LSI Laboratories() |
| 2nd Author's Name | Nobutaro Shibata |
| 2nd Author's Affiliation | NTT LSI Laboratories |
| 3rd Author's Name | Tatsuo Baba |
| 3rd Author's Affiliation | NTT Electronics Technology |
| Date | 1993/11/26 |
| Paper # | SDM93-140,ICD93-134 |
| Volume (vol) | vol.93 |
| Number (no) | 349 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |