Presentation 1995/4/21
Conductance Oscillations in a Split-Gate MOSFET Fabricated on an SOI Substrate
Hiroki Ishikuro, Toshiro Hiramoto, Hiroyuki Fujita, Toshiaki Ikoma,
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Abstract(in English) A very narrow, short channel n-MOSFET has been fabricated utilizing the electrostatic potential confinement by a split-gate on an SOI substrate and it's electrical transport properties have been investigated at very low temperatures (≤4.2 K). Conductance as a function of the split-gate voltage exhibits oscillations near the pinchoff voltage. The oscillations consist of a periodic component and aperiodic components. Current-voltage (I_-V_) characteristics show nonlinearity at small drain voltage when the split-gate voltage was kept at the valley of the conductance oscillations. The origin of the conductance oscillations is discussed in terms of the Coulomb blockade of single electron tunneling and hopping transport .
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Coulomb blockade / single electron tunneling / hopping transport / split-gate / SOI / MOS
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Committee SDM
Conference Date 1995/4/21(1days)
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Registration To Silicon Device and Materials (SDM)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Conductance Oscillations in a Split-Gate MOSFET Fabricated on an SOI Substrate
Sub Title (in English)
Keyword(1) Coulomb blockade
Keyword(2) single electron tunneling
Keyword(3) hopping transport
Keyword(4) split-gate
Keyword(5) SOI
Keyword(6) MOS
1st Author's Name Hiroki Ishikuro
1st Author's Affiliation Institute of Industrial Science, University of Tokyo()
2nd Author's Name Toshiro Hiramoto
2nd Author's Affiliation Institute of Industrial Science, University of Tokyo
3rd Author's Name Hiroyuki Fujita
3rd Author's Affiliation Institute of Industrial Science, University of Tokyo
4th Author's Name Toshiaki Ikoma
4th Author's Affiliation T.I. Tsukuba R&D Center Ltd.
Date 1995/4/21
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Volume (vol) vol.95
Number (no) 10
Page pp.pp.-
#Pages 5
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