| Presentation | 1996/5/23 A Novel Circuit Technology with TIS for Gigabit DRAM's Shigeyoshi Watanabe, Katsuhiko Hieda, Kazumasa Sunouchi, Fumio Horiguchi, Kazunori Ohuchi, Hisashi Hara, Fujio Masuoka, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A novel circuit technology with TIS for Gbit DRAM's has been described. Using the TIS for all the transistors within a chip, by 1.5 generation longer TDDB lifetime of transistor can be successfully achieved compared with a DRAM composed of the conventional planar transistor without sacrificing the chip size and power dissipation. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Gigabit / DRAM / TIS / Reliability |
| Paper # | SDM96-24 |
| Date of Issue |
| Conference Information | |
| Committee | SDM |
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| Conference Date | 1996/5/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Novel Circuit Technology with TIS for Gigabit DRAM's |
| Sub Title (in English) | |
| Keyword(1) | Gigabit |
| Keyword(2) | DRAM |
| Keyword(3) | TIS |
| Keyword(4) | Reliability |
| 1st Author's Name | Shigeyoshi Watanabe |
| 1st Author's Affiliation | Research and Development Center, Toshiba Corporation() |
| 2nd Author's Name | Katsuhiko Hieda |
| 2nd Author's Affiliation | Toshiba c/o IBM East Fishkill Facility |
| 3rd Author's Name | Kazumasa Sunouchi |
| 3rd Author's Affiliation | Research and Development Center, Toshiba Corporation |
| 4th Author's Name | Fumio Horiguchi |
| 4th Author's Affiliation | Semiconductor Group, Toshiba Corporation |
| 5th Author's Name | Kazunori Ohuchi |
| 5th Author's Affiliation | Research and Development Center, Toshiba Corporation |
| 6th Author's Name | Hisashi Hara |
| 6th Author's Affiliation | Research and Development Center, Toshiba Corporation |
| 7th Author's Name | Fujio Masuoka |
| 7th Author's Affiliation | Research Institute of Electrical Communication, Tohoku University |
| Date | 1996/5/23 |
| Paper # | SDM96-24 |
| Volume (vol) | vol.96 |
| Number (no) | 63 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |