Presentation 1997/3/13
Suppression of the parasitic MOSFETs in SOI substrates by hydrogenation process
T. Iwamatsu, T. Ipposhi, S. Miyamoto, Y. Yamaguchi, S. Maegawa, Y. Inoue, T. Nishimura,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) It was found that a hydrogenation process was a effective way to suppress the threshold voltage lowering of the parasitic MOSFETs in SOI MOSFETs. The charge in the oxide at the LOCOS edge region can be separated for two types of charges: One (Qf(LOCOS)) may be induced during the transistor process in the edge region, and the other (Qf(BOX)) may originally exist in SOI/buried oxide interfaces. The threshold voltage of the parasitic MOSFET was reduced by both Qf(LOCOS)and Qf(BOX). Qf(LOCOS) was reduced by hydrogenation, but Qf(BOX) was not reduced. Moreover, the value of Qf(BOX) varied depending on the SOI substrates used.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Thin-Film SOI / LOCOS / parasitic MOSFETs / hydrogenation
Paper # SDM96-224
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Conference Information
Committee SDM
Conference Date 1997/3/13(1days)
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Paper Information
Registration To Silicon Device and Materials (SDM)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Suppression of the parasitic MOSFETs in SOI substrates by hydrogenation process
Sub Title (in English)
Keyword(1) Thin-Film SOI
Keyword(2) LOCOS
Keyword(3) parasitic MOSFETs
Keyword(4) hydrogenation
1st Author's Name T. Iwamatsu
1st Author's Affiliation ULSI Laboratory, Mitsubishi Electric Corporation()
2nd Author's Name T. Ipposhi
2nd Author's Affiliation ULSI Laboratory, Mitsubishi Electric Corporation
3rd Author's Name S. Miyamoto
3rd Author's Affiliation ULSI Laboratory, Mitsubishi Electric Corporation
4th Author's Name Y. Yamaguchi
4th Author's Affiliation ULSI Laboratory, Mitsubishi Electric Corporation
5th Author's Name S. Maegawa
5th Author's Affiliation ULSI Laboratory, Mitsubishi Electric Corporation
6th Author's Name Y. Inoue
6th Author's Affiliation ULSI Laboratory, Mitsubishi Electric Corporation
7th Author's Name T. Nishimura
7th Author's Affiliation ULSI Laboratory, Mitsubishi Electric Corporation
Date 1997/3/13
Paper # SDM96-224
Volume (vol) vol.96
Number (no) 570
Page pp.pp.-
#Pages 6
Date of Issue