| Presentation | 1998/1/23 Electromigration Performance of the Al-Si-Cu filled Vias with Titanium Glue Layer Makiko Kageyama, Keiichi Hashimoto, Hiroshi Onoda, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Electromigration performance of vias filled with Al-Si-Cu alloys on Ti glue layers was investigated in comparison with W-stud vias. Voids were formed at only a few locations in the test structure in Al-Si-Cu filled vias while voids were formed at every via in W-stud viachains. It is supposed that Al moves through the Al-Si-Cu filled vias during electromigration in spite of the existence of the glue layer at the via bottom. However, the Al movement was prohibited at the vias filled with Al-Cu alloy. It is speculated that Al moves through Al-Ti-Si alloy formed at via bottom under electromigration stress. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | electromigration / multilevel interconnects / via-filling / high temperature sputtering / Al-Si-Cu / Ti |
| Paper # | SDM97-183 |
| Date of Issue |
| Conference Information | |
| Committee | SDM |
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| Conference Date | 1998/1/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Electromigration Performance of the Al-Si-Cu filled Vias with Titanium Glue Layer |
| Sub Title (in English) | |
| Keyword(1) | electromigration |
| Keyword(2) | multilevel interconnects |
| Keyword(3) | via-filling |
| Keyword(4) | high temperature sputtering |
| Keyword(5) | Al-Si-Cu |
| Keyword(6) | Ti |
| 1st Author's Name | Makiko Kageyama |
| 1st Author's Affiliation | VLSI R&D Center, Oki Electric Industry Co., Ltd.() |
| 2nd Author's Name | Keiichi Hashimoto |
| 2nd Author's Affiliation | VLSI R&D Center, Oki Electric Industry Co., Ltd. |
| 3rd Author's Name | Hiroshi Onoda |
| 3rd Author's Affiliation | VLSI R&D Center, Oki Electric Industry Co., Ltd. |
| Date | 1998/1/23 |
| Paper # | SDM97-183 |
| Volume (vol) | vol.97 |
| Number (no) | 508 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |