| Presentation | 1997/7/24 Fabrication of oscillation circuits and MOSFET matrix arrays on SOI structures for neural network applications S. M. Yoon, Y. Nagata, J. H. Oh, E. Tokumitsu, H. Ishiwara, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A PFM (pulse frequency modulation) -type neuron circuit composed of MOSFET and CUJT (omplementary unijunction transistor) was fabricated on an SOI (silicon-on-insulator) structure, as an approach to the adaptive learning neuron circuit using ferroelectric-gate FET. The output pulse interval was found to be controlled by changing the pulse duty ratio of input signals as well as the magnitude of DC input voltage. Next, MOSFET matrix arrays for the synaptic connection were also fabricated on SOI structure and the weighted sum operation was demonstarated using the total drain current in parallel connection of MOSFETs. It is concluded from these results that the electrical properties of MOSFET neuron circuit and MOSFET matrix array are good enough for the future neural network using ferroelectric gate FET. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | silicon-on-insulator(SOI) / neuron circuit / complementary unijunction transistor(CUJT) / MOSFET matrix |
| Paper # | SDM97-57 |
| Date of Issue |
| Conference Information | |
| Committee | SDM |
|---|---|
| Conference Date | 1997/7/24(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
|---|---|
| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Fabrication of oscillation circuits and MOSFET matrix arrays on SOI structures for neural network applications |
| Sub Title (in English) | |
| Keyword(1) | silicon-on-insulator(SOI) |
| Keyword(2) | neuron circuit |
| Keyword(3) | complementary unijunction transistor(CUJT) |
| Keyword(4) | MOSFET matrix |
| 1st Author's Name | S. M. Yoon |
| 1st Author's Affiliation | Precision & Intelligence Laboratory, Tokyo Institute of Technology() |
| 2nd Author's Name | Y. Nagata |
| 2nd Author's Affiliation | Precision & Intelligence Laboratory, Tokyo Institute of Technology |
| 3rd Author's Name | J. H. Oh |
| 3rd Author's Affiliation | Precision & Intelligence Laboratory, Tokyo Institute of Technology |
| 4th Author's Name | E. Tokumitsu |
| 4th Author's Affiliation | Precision & Intelligence Laboratory, Tokyo Institute of Technology |
| 5th Author's Name | H. Ishiwara |
| 5th Author's Affiliation | Precision & Intelligence Laboratory, Tokyo Institute of Technology |
| Date | 1997/7/24 |
| Paper # | SDM97-57 |
| Volume (vol) | vol.97 |
| Number (no) | 195 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |