| Presentation | 2000/6/16 On the Analog IC Implementation of a Spatio-Temporal Learning Neural Network Fusa NAKAYAMA, Yaeko KITAHARA, Yoshihiko HORIO, Kazuyuki AIHARA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A spatio-temporal learning algorithm has been proposed by Tsukada et al. as a short-term memory model of the hippocampus. In this paper, we first modify the model so that it would be suitable for an analog integrated circuit implementation. Then, a circuit system structure for the learning system is proposed. The model parameters of the learning algorithm are optimized through the simulations. Moreover, the effects of non-ideal characteristics of the analog circuit components such as finite resolution are investigated. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Spatio-Temporal Learning Rule / Analog IC Implementation / Neural Network |
| Paper # | NLP2000-43,NC2000-37 |
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| Conference Information | |
| Committee | NC |
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| Conference Date | 2000/6/16(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Neurocomputing (NC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | On the Analog IC Implementation of a Spatio-Temporal Learning Neural Network |
| Sub Title (in English) | |
| Keyword(1) | Spatio-Temporal Learning Rule |
| Keyword(2) | Analog IC Implementation |
| Keyword(3) | Neural Network |
| 1st Author's Name | Fusa NAKAYAMA |
| 1st Author's Affiliation | Dept.of Mathematical Engineering, University of Tokyo, Tokyo, Japan() |
| 2nd Author's Name | Yaeko KITAHARA |
| 2nd Author's Affiliation | Dept.of Mathematical Engineering, University of Tokyo, Tokyo, Japan |
| 3rd Author's Name | Yoshihiko HORIO |
| 3rd Author's Affiliation | Dept.of Mathematical Engineering, University of Tokyo, Tokyo, Japan |
| 4th Author's Name | Kazuyuki AIHARA |
| 4th Author's Affiliation | Dept.of Mathematical Engineering, University of Tokyo, Tokyo, JapanDept.of Electronic Engineering, Tokyo Denki University, Tokyo, Japan |
| Date | 2000/6/16 |
| Paper # | NLP2000-43,NC2000-37 |
| Volume (vol) | vol.100 |
| Number (no) | 127 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |