Presentation 1993/9/22
Very-High-Speed Analog Neural Network LSI Implementation For Neural Processing Type Optical Demultiplexer
Shigeki Aisawa, Kazuhiro Noguchi, Takao Matsumoto,
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Abstract(in English) We have designed and fabricated very-high-speed analog neural network LSI chips for neural processing type optical demultiplexer. The LSI consists of ten neurons and 100 electrically modifiable synaptic weights.The slope factor of the sigmoidal function is modifiable for learning.The nonlinear mapping function of the neural network has been successfully demonstrated at 150Mb, s with the fabricated LSI.
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Keyword(in English) neural network / analog LSI / wavelength division multiplexing / optical demultiplexer
Paper # NC93-42
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Committee NC
Conference Date 1993/9/22(1days)
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Registration To Neurocomputing (NC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Very-High-Speed Analog Neural Network LSI Implementation For Neural Processing Type Optical Demultiplexer
Sub Title (in English)
Keyword(1) neural network
Keyword(2) analog LSI
Keyword(3) wavelength division multiplexing
Keyword(4) optical demultiplexer
1st Author's Name Shigeki Aisawa
1st Author's Affiliation NTT Transmission Systems Laboratories()
2nd Author's Name Kazuhiro Noguchi
2nd Author's Affiliation NTT Transmission Systems Laboratories
3rd Author's Name Takao Matsumoto
3rd Author's Affiliation NTT Transmission Systems Laboratories
Date 1993/9/22
Paper # NC93-42
Volume (vol) vol.93
Number (no) 247
Page pp.pp.-
#Pages 6
Date of Issue