Presentation | 1997/3/17 A subthreshold MOS integrated circuit for the Lotka-Volterra netral network posessing the winner-take-all and winners-share-all solutions Tetsuya Asai, Masahiro Ohtani, Hiroo Yonezu, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | A subthreshold MOS integrated circuit is proposed and fabricated for implementing a competitive neural network obeying a Lotka-Volterra-type equation, which is derived from conventional membrane dynamics of neurons and is used for the selection of external inputs. The steady-state solutions to the equation can be classified into three types, i.e., winner-take-all (WTA), winners-share-all(WSA) and variant winner-take-all solutions(VWTA), each of which represents qualitatively different selection behavior. Among the solutions, the WSA solution in which a certain number of neurons remain activated in steady states is particularly useful owing to robustness in the selection of inputs from a noisy environment. The measured results of the fabricated MOS circuit of LV networks indicate that correct equilibrium properties can be obtained when a number of neurons work together, which implies a collective information processing will be nessesarry for the errorless neural computation in noisy environment. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | competitive neural networks / Lotka-Volterra system / WTA / Winners-Share-All / analog circuits / LSI |
Paper # | NC96-115 |
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Conference Information | |
Committee | NC |
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Conference Date | 1997/3/17(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Neurocomputing (NC) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A subthreshold MOS integrated circuit for the Lotka-Volterra netral network posessing the winner-take-all and winners-share-all solutions |
Sub Title (in English) | |
Keyword(1) | competitive neural networks |
Keyword(2) | Lotka-Volterra system |
Keyword(3) | WTA |
Keyword(4) | Winners-Share-All |
Keyword(5) | analog circuits |
Keyword(6) | LSI |
1st Author's Name | Tetsuya Asai |
1st Author's Affiliation | Department of Electrical and Electronic Engineering, Toyohashi University of Technology() |
2nd Author's Name | Masahiro Ohtani |
2nd Author's Affiliation | Department of Electrical and Electronic Engineering, Toyohashi University of Technology |
3rd Author's Name | Hiroo Yonezu |
3rd Author's Affiliation | Department of Electrical and Electronic Engineering, Toyohashi University of Technology |
Date | 1997/3/17 |
Paper # | NC96-115 |
Volume (vol) | vol.96 |
Number (no) | 583 |
Page | pp.pp.- |
#Pages | 8 |
Date of Issue |