Presentation 1997/2/6
A Novel Implementation Circuit of SHN aIld its Application
Makoto Korehisa, Kenya Jin'no, Mamoru Tanaka,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) This article proposes an implementation circuit of a Simple Hystersis Network whose output function is a piecewise linear hystersis. This circuit is an improvement version of a voltage mode circuit, the novel circuit drives current mode. We can apply the SHN to A/D converter, Winner-Take-All circuits and so on In this article, we propose an implementation circuit of a hysteresis quantizen, and we simulate it.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Hystersis / OTA / Quantimize / MOS circuits / Current mode / SPICE
Paper # NLP96-134,NC96-88
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Committee NC
Conference Date 1997/2/6(1days)
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Registration To Neurocomputing (NC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Novel Implementation Circuit of SHN aIld its Application
Sub Title (in English)
Keyword(1) Hystersis
Keyword(2) OTA
Keyword(3) Quantimize
Keyword(4) MOS circuits
Keyword(5) Current mode
Keyword(6) SPICE
1st Author's Name Makoto Korehisa
1st Author's Affiliation Department of Electronic and Electrical Engineering, Faculty of Science and Engineering, Sophia University()
2nd Author's Name Kenya Jin'no
2nd Author's Affiliation Department of Electronic and Electrical Engineering, Faculty of Science and Engineering, Sophia University
3rd Author's Name Mamoru Tanaka
3rd Author's Affiliation Department of Electronic and Electrical Engineering, Faculty of Science and Engineering, Sophia University
Date 1997/2/6
Paper # NLP96-134,NC96-88
Volume (vol) vol.96
Number (no) 511
Page pp.pp.-
#Pages 8
Date of Issue