Presentation 2002/1/16
Design of a 4×4 Banyan SFQ Switch
Junji TAKAHASHI, Hiroaki MYOREN, Susumu TAKADA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) We have designed a 4×4 Banyan switch using SFQ logic circuits. The switch is composed of three parts; one is input buffer, the second is a contention solver which checks packet conpetition to avoid a conflict in the distribution network, the third is a packet distribution network which distributes contention free packets to their destination adress. The packet distribution network is composed of Batcher-Banyan switch with input buffer. The contention solver decides to send a data packet to distribution network, using only internal routing packet which is added to packet in the switch. As circuit is composed of two parts, contention solver and packet distribution network, transfer rate is raised because it doesn't need to wait any more while a data packet passes through the distribution network. Simulation results using JSIM show that the switch circuit can operate at 40GHz.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) SFQ logic / Banyan switch / Packet
Paper # SCE2001-34
Date of Issue

Conference Information
Committee SCE
Conference Date 2002/1/16(1days)
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Paper Information
Registration To Superconductive Electronics (SCE)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design of a 4×4 Banyan SFQ Switch
Sub Title (in English)
Keyword(1) SFQ logic
Keyword(2) Banyan switch
Keyword(3) Packet
1st Author's Name Junji TAKAHASHI
1st Author's Affiliation Department of Engineering, Saitama University()
2nd Author's Name Hiroaki MYOREN
2nd Author's Affiliation Department of Engineering, Saitama University
3rd Author's Name Susumu TAKADA
3rd Author's Affiliation Department of Engineering, Saitama University
Date 2002/1/16
Paper # SCE2001-34
Volume (vol) vol.101
Number (no) 574
Page pp.pp.-
#Pages 6
Date of Issue