Presentation | 2001/7/7 Clock skew tolerance of single flux quantum circuits Itaru Kurosawa, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | A low-skew, high-frequency clocking system is essential for rapid single flux quantum(RSFQ) digital circuits. In practical systems, however, some clock skew or timing jitter are unavoidable. We have investigated the effect of the skew on RSFQ circuits by computer simulation. In the case of zero clock skew shift register circuit with maximum clock frequency of 42 GHz, the clock skew tolerance of the circuit increases to ±10 ps at clock frequency of 30 GHz. It is important to design the circuit system with numerical data about clock skew. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | single flux quantum circuit / RSFQ circuit / clock skew / zero-clock-skew shift register |
Paper # | SCE2001-18 |
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Conference Information | |
Committee | SCE |
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Conference Date | 2001/7/7(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Superconductive Electronics (SCE) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Clock skew tolerance of single flux quantum circuits |
Sub Title (in English) | |
Keyword(1) | single flux quantum circuit |
Keyword(2) | RSFQ circuit |
Keyword(3) | clock skew |
Keyword(4) | zero-clock-skew shift register |
1st Author's Name | Itaru Kurosawa |
1st Author's Affiliation | Japan Women's University() |
Date | 2001/7/7 |
Paper # | SCE2001-18 |
Volume (vol) | vol.101 |
Number (no) | 183 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |