| Presentation | 2001/1/17 Design of Phase Mode Parallel Multiplier Masashi Seki, Takeshi Onomi, Koji Nakajima, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We designed multipliers using ADDER cells and AND cells. The cells are using some elements based on ICF gate that is the basic cell of the Phase-Mode logic. The multiplier has three stages, AND ARRAY, CSA ADDER, and CLA ADDER, and the structure is suitable for using the pulse of SFQ (Single Flux Quantum). Using these cells, we designed a 2bitX2bit multiplier based on the circuit design rule of the NEC Co., Ltd. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Superconducting logic circuit / SFQ / multiplier / ICF gate |
| Paper # | SCE2000-45 |
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| Conference Information | |
| Committee | SCE |
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| Conference Date | 2001/1/17(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design of Phase Mode Parallel Multiplier |
| Sub Title (in English) | |
| Keyword(1) | Superconducting logic circuit |
| Keyword(2) | SFQ |
| Keyword(3) | multiplier |
| Keyword(4) | ICF gate |
| 1st Author's Name | Masashi Seki |
| 1st Author's Affiliation | Research Institute of Electrical Communication, Tohoku University() |
| 2nd Author's Name | Takeshi Onomi |
| 2nd Author's Affiliation | Research Institute of Electrical Communication, Tohoku University |
| 3rd Author's Name | Koji Nakajima |
| 3rd Author's Affiliation | Research Institute of Electrical Communication, Tohoku University |
| Date | 2001/1/17 |
| Paper # | SCE2000-45 |
| Volume (vol) | vol.100 |
| Number (no) | 572 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |